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Meta Heuristics for Combinatorial Optimization
Min Quyang, M. Toulouse, K. Thulasiraman, F. Glover, and J. S. Deogun, “MultiLevel Cooperative Search for the Circuit/Hypergraph Partitioning Problem”, IEEE Trans. on CAD of Integrated Circuits and Systems, vol.21, June 2002, pp. 685-693. See also M. Toulouse, K. Thulasiraman and F. Glover, “Multi-Level Cooperative Search: A New Paradigm for Combinatorial Optimization and an Application to Graph Partitioning", International European Parallel Processing Conference, Vol. 1685, Lecture Notes in Computer Science, 1999, pp. 533-542
M. Toulouse, T. Crainic, and K. Thulasiraman, “Global Optimization Properties of Parallel Cooperative Search Algorithms: A Simulation study”, Parallel Computing, Vol. 26, 2000, pp. 91-92.
M. Toulouse, T. G. Crainic, Sanso, and K. Thulasiraman, “Self-Organization in Cooperative Tabu Search Algorithms”, IEEE International Conference on Systems, Man, and Cybernetics.
J. Lienig and K. Thulasiraman, “GASBOR: A New Genetic Algorithm for Switch-Box Routing in Integrated Circuits”, Journal of Circuits, Systems and Computers. Vol. 6, 1996, pp. 356-373. See also J. Lienig and K. Thulasiraman, “GASBOR: A Genetic Algorithm for Switch-Box Routing in Integrated Circuits”, Proc. AI ‘94 Workshop on Evolutionary Computation, Armidale, Australia, 1994, pp. 199-212.
J. Lienig and K. Thulasiraman, “A Genetic Algorithm for Channel Routing in VLSI Circuits”, Evolutionary Computation, Vol. 1, No. 4, 1994, pp. 293-331. Also see Proc. Seventh Intl. Conf. on VLSI Design, Calcutta, January 1994, pp. 133-136.
Y. C. Zhao, L. Tao, K. Thulasiraman and M. N. S. Swamy, “An Efficient Simulated Annealing Algorithm for Graph Bisectioning ”, Proc. Canadian Conf. on Electrical and Comp. Engr., Ottawa, Canada, 1991.