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UNIVERSITY OF MASSACHUSETTS
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CMPSCI 591I |
Java for Embedded Systems |
Fall 1998 |
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In this seminar we'll look at some of the issues involved in the use of the Java language for creating and interacting with embedded systems. To provide focus for the course, we will consider one particular embedded system, namely a model railway which is controlled by a distributed system of micro-controllers, one per track-section. This system actually exists, in Room 220 in the Tower.
So one thing we'll look at is how to construct a server that presents the state of an embedded system on the Web, and receives commands, validates them, and if valid executes them. If they're invalid, the server should provide diagnostic information. Such validation has to embody domain semantics, which go beyond what is built into Java or its standard class libraries. Naturally, we'll have to discuss how we choose a suitable level of abstraction for the interface. The decisions here are not unlike those involved in operating system design, namely we have to present an interface that preserves certain invariants (in our example, only one train can be on a section of track at any one time). What distinguishes embedded systems is that the invariants relevant to an embedded system are specific to an application.
Possible uses of Java in developing an embedded system can be categorised as:
We'd see these various uses as being unified through a common Interface definition.
An embedded system, especially a large one, is likely to be heterogeneous. That is to say, it will be composed of a number of distinct and different processing elements - micro-controllers, standard processors, Digital Signal Processors, various kinds of programmable and discrete logic, together with analog circuitry. To understand the issues here, we'll take a look at the Scale project, here at UMASS.
However if you do have hardware expertise, you'll be welcome to do a project that involves hardware building using the resources of the Embedded Systems Teaching Lab (220 in the Tower).
Here are some of the documents that we will consider in the seminar.
"Java Native Interface is a standard programming interface for writing Java native methods and embedding the Java virtual machine into native applications. The primary goal is binary compatibility of native method libraries across all Java virtual machine implementations on a given platform."
"The Java Virtual Machine is the cornerstone of the Java programming language. It is the component of the Java technology responsible for Java's cross-platform delivery, the small size of its compiled code, and Java's ability to protect users from malicious programs. The Java Virtual Machine is an abstract computing machine. Like a real computing machine, it has an instruction set and uses various memory areas. It is reasonably common to implement a programming language using a virtual machine; the best-known virtual machine may be the P-Code machine of UCSD Pascal.
It is not inherently interpreted, and it may just as well be implemented by compiling its instruction set to that of a real CPU, as for a conventional programming language. It may also be implemented in microcode, or directly in silicon.
The Java Virtual Machine knows nothing of the Java programming language, only of a particular file format, the class file format. A class file contains Java Virtual Machine instructions (or bytecodes) and a symbol table, as well as other ancillary information. Thus it is a possible target language for compilers of languages other than Java.
One of the challenges of using Java (and therefore the JVM) for embedded systems is the small size of many target architectures. The JVM is defined to use integers at least 32 bits wide, but micro-controllers such as the MC68HC11 are 8-bit machines. We'll have to examine the possibilities of analysing JVM code to determine whether particular operations can in fact be implemented as 8-bit or 16-bit operations. Another issue is going to be whether a JVM can be distributed between a capable host (say a PC) and a micro-controller, with just enough code being loaded into the controller to support the application." [source Javasoft Web Site]
Bruce Jacob
Bruce Jacob is Assistant Professor Department of Electrical Engineering
University of Maryland at College Park
This paper discusses how aspects of cache management that are customarily performed by hardware can in fact be implemented in software, with increased speed and versatility. Cache is an important issue for Embedded Systems because it introduces a stochastic element into execution time. Many embedded systems require hard real-time guarantees of performance, so that conventional cache can be worse-than-useless, since worst-case assumptions have to be made in predicting, say, interrupt service times.
Software management of cache offers versatility, for example the possibility of locking time-critical code into cache. [Source: RJP]
"Digital Signal Processors (DSPs) represent a compromise between a high-speed specialized-hardware vector processor and a low-speed generalized-hardware data processor. DSPs do math operations faster than DPs and are more software flexible than vector processors. They are optimized for the multiply-accumulate (MAC) signal processing function. Modern vector processors tend to be based on DSP elements. Some currently available choices for a DSP are the TI 320C40, Motorola 56000, Intel i860, and ADC 21020." [Source: website below] A brief guide to available Digital Signal Processors
The DSP56005 is an MPU-style general purpose Digital Signal Processor (DSP), composed of an efficient 24-bit digital signal processor core, program and data memories, various peripherals, and support circuitry. The 56000-Family-compatible DSP core is fed by a large program RAM, two in-dependent data RAMs, and two data ROMs with sine and arc-tangent tables. Like the DSP56002, the DSP56005 contains a Serial Communication Interface (SCI), Synchronous Serial Interface (SSI), parallel Host Interface (HI), a 24-bit timer/event counter, and On-Chip Emulation (OnCE) port. Unique features of the DSP56005 include the large on-chip program memory, five Pulse Width Modulators (PWM), a watchdog timer, and an address decode pin for external peripherals. This combination of features makes the DSP56005 a cost-effective, high-perfor-mance solution for many DSP and control applications, especially in high-performance motor con-trol, optical disk drives and audio processing." [Source: Motorola Web Page, above]
"The TMS320C6201, the world's most powerful general-purpose, programmable digital signal processor (DSP), is the first fixed-point DSP in the industry to adopt VelociTI™, an advanced Very Long Instruction Word (VLIW) architecture which cuts software development time in half. At 1600 MIPS/200 MHz, the 'C6201 DSP delivers 10 times the performance of the highest performing DSPs currently on the market at a 50 percent lower DSP cost-per-channel in applications like wireless base stations, remote access servers (RAS), pooled modems, cable modems, and digital subscriber loop (xDSL) systems." [Source: TI Web page above]
"Shift is a programming language for describing dynamic networks of hybrid automata. Such systems consist of components which can be created, interconnected and destroyed as the system evolves. Components exhibit hybrid behaviour, consisting of continuous-time phases separated by discrete-event transitions." [Source: abstract from above paper]
Value Cloning [Source: ftp://cs.mtu.edu/pub/carr/ValueCloning.ps.gz]
This compiler infrastructure will produce better compilers that generate programs with better performance for individual machines, and will make it possible to develop portable applications with high performance on heterogeneous systems. A key component is a new bi-level intermediate representation (Score) that uses property driven optimization. Our own and other research is still attacking the difficult problems of optimizing for machines that implement a single model of parallelism. Our compiler framework will accelerate this work because the modular analysis and transformations will keep implicit assumptions about the architecture out of the mechanisms. Each target will use a policy for applying the optimizations. For a given machine or class of machines, the framework will enable reuse and experimentation with optimizations and transformations not originally envisioned for the machine. It will thus enable us to further investigate how to optimize for individual machines. [Source: CS Dept Web Page]
Intelligent environments are an interesting development and research application problem for multi-agent systems. The functional and spatial distribution of tasks naturally lends itself to a multi-agent model and the existence of shared resources creates interactions over which the agents must coordinate. In the UMASS Intelligent Home project we have designed and implemented a set of distributed autonomous home control agents and deployed them in a simulated home environment. Our focus is primarily on resource coordination, though this project has multiple goals and areas of exploration ranging from the intellectual evaluation of the application as a general MAS testbed to the practical evaluation of our agent building and simulation tools. [Source: UMASS CS Technical Reporet 1998-40]