Operating Systems (CS 377):
Homework 5

NEW DUE DATE: November 26 , 2002 23:30

What to Hand In

Everyone must hand in their own work. In order to get credit for this assignment, it must be handed in accordingly: Place in your Hand-In directory (~/cs377/hw5/) one of the following: README (raw text file), README.ps (a postscript file), or README.pdf. The file must contain your name, user id, and answers to the questions listed below.

You can check the location of your file by using the "~fagg/bin/checkhw hw5" command.

Q1. As defined on page 317 of the textbook, a stack (page replacement) algorithm is one with the following property: the set of pages in memory for n frames is always a subset of the set of pages that would be in memory with n+1 frames. For the second-chance, LFU, and MFU algorithms, answer the following questions:
  1. Which one(s) of them is(are) stack algorithm(s)? Explain
  2. Which one(s) of them could exhibit Belady's anomaly? Explain

Q2. Consider a virtual memory system. Each memory access without a page fault takes 300ns. Memory accesses with a page fault requires 20ms.
  1. Calculate the average memory access performance if the page fault probability is 10-9 and 10-6, respectively.
  2. Now suppose an LRU is used for page replacement. No hardware support has been provided. For each memory access, the LRU requires 30us in processing on top of 300ns of memory access. Assume the page fault probability is 10-9 and memory access with page fault takes 20ms (we can ignore the cost of LRU in this latter case), calculate the average memory access delay.
  3. Now if the LRU is implemented by hardware and does not incur any cost for memory access, redo the calculation in part 2.
  4. Redo the calculation in part 3 assuming that a memory access with page fault now takes 40ms due to the cost of copying the page being replaced onto the disk.
  5. What can you conclude from your calculations?

Q3. Why does a pure paging scheme not suffer from external fragmentation?

Q4. When will thrashing occur?

Q5. Address Translation. Assume a frame size of 512 bytes, a physical memory size of 64 MiB (mebibytes), and a page table of 16 entries. These entries are:
index entry
0x0 0x17
0x1 0x03
0x2 0x0A
0x3 0x1F
0x4 0x22
0x5 0x32
0x6 0x09
0x7 0x14
0x8 0x1B
0x9 0x0B
0xA 0x2C
0xB 0x1D
0xC 0x0D
0xD 0x3E
0xE 0x07
0xF 0x1A
  1. How many frames of memory are there?
  2. How many pages can a process address?
  3. How much memory can a process address?
  4. What is the physical address that corresponds to virtual address 0x057A?
  5. What is the physical address that corresponds to virtual address 0x1B8C?
  6. What is the virtual address that corresponds to physical address 0x7D38?
  7. What is the virtual address that corresponds to physical address 0x05B1? (follow your intuition on this one)

Q6. How much time did you spend on this homework assignment?